1. Field of the Invention
The present invention relates to a substrate having a buried structure that serves as an interconnect, a black matrix (light blocking film) or a waveguide. The present invention also relates to a display device including such a substrate, a method of making the substrate and a method of fabricating the display device.
2. Description of the Related Art
Various types of display devices currently under development, including liquid crystal display devices and organic EL display devices, have been reducing their thicknesses and increasing their definition or screen size day after day. These display devices with reduced thicknesses may be driven by various techniques. Among other things, an active-matrix addressing technique contributes particularly effectively to the improvement of display definition.
An active-matrix addressed display device includes multiple active components (e.g., TFTs or MIMS), each being provided for an associated one of its pixels. In a display device of this type, the optical state of a pixel is changeable by way of its associated active component. Each active component is formed on a glass substrate and connected to a gate line and a source line. For example, a TFT, which is provided for associated one of pixels that are arranged in columns and rows (i.e., in matrix), is connected to a gate line (or scan line) and a source line (or data line) that intersect with each other.
A glass substrate, on which multiple active components are formed in matrix in this manner (which is often called an “active-matrix substrate”), normally has a structure in which multiple gate lines and multiple source lines cross each other. For example, an active-matrix substrate may be formed in such a manner that the source lines extend over, and overlap with, the gate lines. In that case, although an insulating film is interposed between each gate line and associated one of the source lines, the source line still has to get over level differences that are created by the gate line.
Accordingly, to prevent the source line from being discontinued by the level differences created by the gate line or to keep the orientation state of liquid crystal molecules in a liquid crystal display device from being disturbed by those level differences on the surface of the substrate, the level differences need to either reduce its height (or thickness) or decrease the angle that the level differences define with respect to the surface of the substrate. On the other hand, the gate lines and source lines should have resistance that is low enough to transmit a predetermined electric signal at a sufficiently high rate. To satisfy these requirements, interconnects, including the gate and source lines, on a conventional active-matrix substrate have their thickness limited (e.g., to 0.3 μm or less) so as not to be discontinued (or disconnected) by those level differences and also have their width adjusted so as to reduce their resistance sufficiently. The interconnects sometimes have tapered side surfaces for these purposes.
In this manner, according to the conventional techniques, an interconnect having a limited thickness should have its width adjusted to obtain a desired resistance value. That is to say, the conventional techniques allow only a low degree of flexibility for the interconnects being designed. Thus, in a transmission type liquid crystal display device, for example, the aperture ratio thereof has to be sacrificed to make the interconnects satisfy those requirements. It is already known that a display device having a diagonal size of greater than 10 inches has its aperture ratio adversely limited by such an interconnection structure.
In a transmission type liquid crystal display device, however, as its aperture ratio decreases, the luminance of the image displayed thereon decreases or the power dissipation thereof increases. Accordingly, to enhance the performance of a transmission type display device, interconnects having a narrow line width and a sufficiently low resistance value need to be realized.
To overcome these problems, a method of reducing the thickness of the level differences on the substrate and realizing interconnects with a sufficiently low resistance value was proposed in Japanese Laid-Open Publication No. 4-170519, for example. According to this proposed method, an interconnect, having a thickness greater than that of the conventional one, is embedded in a groove that has been formed on the surface of a substrate. An interconnect of this type will be herein referred to as an “inlaid interconnect”.
However, the technique of forming such an inlaid interconnect on the surface of a glass substrate has not been established yet. For that reason, Japanese Laid-Open Publication No. 4-170519 identified above provides no disclosure about a specific method of forming the groove on the surface of a glass substrate. The present inventors discovered and confirmed via experiments that when a glass substrate was wet-etched by using a conventional etchant as a mixture of hydrofluoric acid and ammonium fluoride, the surface could not be etched uniformly or at a sufficiently high rate or might have a groove with a width that had been unnecessarily broadened by an abnormal side-etching phenomenon. If the surface of a glass substrate is etched non-uniformly, then the etched surface will scatter light excessively to make the displayed image whitened.